Signal processor of pulse encoder

ABSTRACT

A light receiving element (1) and an operation transistor (3) are connected in series, a plurality of signal output transistors (5a, 5b) are current-miller-connected to the operation transistors (3) in parallel, and photoelectrically converted output signals (O 1 , O 2 ) are separately applied to a plurality of circuits in parallel from the plurality of the signal output transistors (5a, 5b). As a result, in the plurality of the circuits which receive the photoelectrically converted output signals (O 1 , O 2 ) in parallel to carry out predetermined processes, interference will not occur, the signals are processed correctly, the power consumption is reduced, and the speed of responsitivity is improved.

TECHNICAL FIELD

The present invention relates to a signal processor of a pulse encoder,more particularly, to a signal processor of a pulse encoder forphotoelectrically converting light made incident onto a light receivingelement into output signals and supplying the photoelectricallyconverted output signals in parallel to a plurality of circuits to carryout predetermined processes.

BACKGROUND ART

For example, a prior signal processor of a pulse encoder comprisesphotodiodes and resistors, and when light is made incident onto thephotodiodes, a current flows through the photodiodes in response to astrength of the light, and voltage caused by the flow of current throughthe photodiodes at both ends of the resistors, are picked up as theoutput signals.

Note, recently a technique for improving a resolution of a pulse encoderhas been studied and developed by processing the photoelectricallyconverted output signals. In the prior art, a signal processor of thepulse encoder for improving the resolution of the pulse encoder such asthe above described device has been proposed which, for example,comprises four differential amplifiers and outputs signals having aphase difference of 45 degrees from four output signals having a phasedifference of 90 degrees.

However, in the signal processor of the pulse encoder according to theprior art, one photoelectrically converted output signal is directlyapplied to the input terminals of a plurality of differentialamplifiers, and each of the differential amplifiers has a hysteresisresistor connected in parallel between the input terminal and an outputterminal thereof. Consequently, the photoelectrically converted outputsignal applied to the input terminals of the differential amplifiers areaffected by the output terminals of the differential amplifiers throughhysteresis resistors, so that the four signals processed by thedifferential amplifiers do not have a correct phase difference of 45degrees.

DISCLOSURE OF THE INVENTION

The object of the present invention is to perform the predeterminedprocesses correctly without interference, to reduce the powerconsumption, and to improve the operation speed, in a plurality of thecircuits receiving the photoelectrically converted output signals inparallel.

According to the present invention, there is provided a signal processorof a pulse encoder for photoelectrically converting light made incidentonto a light receiving element into output signals, and supplying thephotoelectrically converted output signals to a plurality of circuits tocarry out predetermined processes, characterized in that the signalprocessor comprises: an operation transistor having a first input towhich a first power source voltage is applied through the lightreceiving element, a second input to which a second power source voltageis applied and commonly connected to the first input, and a third inputwhich is grounded; a plurality of signal output resistors, one endsthereof being supplied with a third power source voltage; and aplurality of signal output transistors of a same number as that of thesignal output resistors, having first inputs connected to the other endsof the signal output resistors, second inputs connected to the secondinput of said operation transistor, and third inputs which are grounded,to be operated in accordance with the operation transistor, thephotoelectrically converted output signals to be supplied in parallel tothe plurality of circuits being separately supplied from respectiveconnections between the signal output resistors and the first inputs ofthe signal output transistors.

According to the signal processor of the pulse encoder of the presentinvention having the above described configuration, photoelectricallyconverted output signals applied in parallel to the input terminals of aplurality of differential amplifiers are separately supplied from theconnection portion between each signal output resistor and the firstinput of each signal output transistor, so that the signal processing ofthe signal processor can be carried out correctly by reducing a mutualinterference. Furthermore, a power consumption of the signal processorof the pulse encoder according to the present invention can be reduced,and a speed of responsitivity thereof can be improved.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a circuit diagram showing an example of a signal processor ofa pulse encoder according to a prior art;

FIG. 2 is a circuit diagram showing an example of a signal processingcircuit to which signals obtained by the circuit shown in FIG. 1 aresupplied;

FIG. 3 is a waveform diagram showing signals to be processed by thecircuit shown in FIG. 2;

FIG. 4 is a circuit diagram showing the principle of a signal processorof a pulse encoder according to the present invention;

FIG. 5 is a schematic view showing an example of a pulse encoderadopting the signal processor of the pulse encoder according to thepresent invention;

FIG. 6 is a circuit diagram showing an embodiment of the signalprocessor of the pulse encoder according to the present invention;

FIG. 7 is a circuit diagram showing an example of signal processingcircuit to which signals obtained by the circuit shown in FIG. 6 aresupplied; and,

FIG. 8 is a waveform diagram showing signals to be processed by thecircuit shown in FIG. 7.

BEST MODE FOR CARRYING OUT THE INVENTION

First, the problems of a signal processor of a pulse encoder accordingto a prior art will be explained with reference to FIG. 1 to FIG. 3,before the explanation of an embodiment of a signal processor of a pulseencoder according to the present invention, and then the principle ofthe signal processor of the pulse encoder according to the presentinvention will be explained with reference to FIG. 4.

FIG. 1 is a circuit diagram showing an example of a signal processor ofa pulse encoder according to a prior art. As shown in this circuitdiagram the signal processor of the pulse encoder according to the priorart comprises photodiodes 111, 121, 131, 141, and resistors 115, 125,135, 145. A power source voltage V_(cc) is applied to respectivecathodes of the photodiodes 111, 121, 131, 141 and respective anodes ofthe photodiodes are grounded to an earth GND through the resistors 115,125, 135, 145 respectively. From connection portions between thephotodiodes 111, 121, 131, 141 and resistors 115, 125, 135, 145, outputsignals A₀, A₀, B₀, B₀ are picked up. That is, if light hν is madeincident onto the photodiode 111, a current I_(d) ' flows through thephotodiode 111 in response to a strength of the light hν. A voltagecaused by the current I_(d) ' at both ends of the resistor 115 is pickedup as the output signal A₀ from the connection portion between thephotodiode 111 and the resistor 115. The other output signals A₀, B₀, B₀are picked up in the same manner. Among the four output signals A₀, A₀,B₀, B₀, the signal A₀ is an inverted signal of the signal A₀, and thesignal B₀ is an inverted signal of the signal B₀. Further, a phase ofthe signal A₀ is different from that of the signal B₀ by 90 degrees, andthus each of the signals A₀, A₀, B₀, B₀ has a phase difference of 90degrees.

FIG. 2 is a circuit diagram showing an example of a signal processingcircuit to which signals obtained by the circuit shown in FIG. 1 aresupplied.

The four output signals A₀, A₀, B₀, B₀ described above, are applied tofour differential amplifiers e₁, e₂, e₃, e₄, respectively. The fourdifferential amplifiers e₁, e₂, e₃, e₄ carry out predetermined processesto provide four signals d₁, d₂, d₃, d₄ which will improve the resolutionof the pulse encoder. Note, the signal d₁ is (A₀ -A₀), the signal d₂ is(A₀ -B₀), the signal d₃ is (B₀ - B₀), and the signal d₄ is (B₀ -A₀), andthus each of the four signals d₁, d₂, d₃, d₄ theoretically has a phasedifference of 45 degrees.

As described in the above, in the signal processor of the pulse encoderaccording to the prior art, one photoelectrically converted outputsignal is applied to the input terminals of a plurality of differentialamplifiers. For example, the output signal A₀ is applied to inputterminals of the differential amplifiers e₁, e₂ and to an invertedoutput terminal of the differential amplifiers e₄. Similarly, the outputsignal B₀ is applied to input terminals of the differential amplifierse₃, e₄.

Note, hysteresis resistors r₁, r₂, r₃, r₄ are connected in parallelbetween the input terminals and the output terminals of the differentialamplifiers e₁, e₂, e₃, e₄ respectively. These hysteresis resistors r₁,r₂, r₃, r₄ prevent oscillation of the differential amplifiers, even ifthe same level signals are applied to the respective differentialamplifiers. Therefore, the affects of the output terminals of thedifferential amplifiers e₁, e₂ are added to the signal A₀ through thehysteresis resistors r₁, r₂, and affects of the output terminals of thedifferential amplifiers e₃, e₄ are added to the signal B₀ through thehysteresis resistors r₃, r₄. The output signal A₀ is applied to theinverted input terminal of the differential amplifier e₁, and the outputsignal B₀ is applied to the inverted input terminal of the differentialamplifiers e₃, e₄.

FIG. 3 is a view explaining the problems of the prior art, and showing awaveform of signals processed by the circuit shown in FIG. 2. Asapparent from FIG. 3(a) and 3(b), due to the affects (deformation of thewaveforms of the output signals A₀ and B₀) of the hysteresis resistorsr₁, r₂, r₃, r₄ provided from the differential amplifiers e₁, e₂, e₃, e₄respectively, each of the waveforms of the four signals d₁, d₂, d₃, d₄processed by the differential amplifiers e₁, e₂, e₃, e₄ shown in FIG. 2does not have a correct phase difference of 45 degrees. That is,although the four signals d₁, d₂, d₃, d₄ accurately divide an intervalin which the signal A₀ changes from 0 to 180 degrees into four segments(45-degree intervals), the signals provide four processed signals withintervals w₁ , w₂, w₃, w₄ which are not equal to each other, in that theinterval w₁ is short and the interval w₂ is long, as shown in FIG. 3(b).Therefore, it is impossible to improve the resolution of the pulseencoder.

The present invention intends to solve the problems of the signalprocessor of the pulse encoder according to the prior art.

Next, the principle of a signal processor of a pulse encoder accordingto the present invention will be described.

FIG. 4 is a circuit diagram showing the principle of a signal processorof a pulse encoder according to the present invention. As shown in FIG.4, the signal processor of the pulse encoder according to the presentinvention photoelectrically converts light made incident onto a lightreceiving element 1 into output signals O₁, O₂, and applies thephotoelectrically converted output signals to a plurality of circuits tocarry out predetermined processes. This signal processor of the pulseencoder according to the present invention comprises; an operationtransistor 3 having a first input to which a first power source voltageV₁ is applied through the light receiving element 1, a second input towhich a second power source voltage V₂ is applied and commonly connectedto the first input, and a third input which is grounded; a plurality ofsignal output resistors 4a, 4b, one ends thereof being supplied with athird power source voltage V₃ ; and a plurality of signal outputtransistors 5a, 5b of the same number as that of the signal outputresistors, having first inputs connected to the other ends of the signaloutput resistors 4a, 4b, second inputs connected to the second input ofthe operation transistor 3, and third inputs which are grounded, to beoperated in accordance with the operation transistor 3.

The photoelectrically converted output signals O₁, O₂ to be supplied inparallel to the plurality of circuits are separately supplied fromrespective connections between the signal output resistors 4a, 4b andthe first inputs of the signal output transistors 5a, 5b.

According to the signal processor of the pulse encoder of the presentinvention with the above described configuration, one end of the lightreceiving element 1 is supplied with the power source voltage V₁, andanother end of the light receiving element is connected to the firstinput of the operation transistor 3. The second input of the operationtransistor is connected to one end of the voltage holding resistor 2,the another of which end receives the power source V₂ and is commonlyconnected to the light input of the operation transistor 3. The thirdinput of the operation transistor is grounded to the earth GND.

The signal output transistors 5a, 5b are provided in the same number asthat of the plurality of the signal output resistors 4a 4b, one ends ofwhich receive the power source voltage V₃. The first inputs of thesignal output transistors are connected to the signal output resistors4a, 4b, the second inputs thereof are commonly connected to the secondinput of the operation transistor 3, and the third inputs thereof aregrounded to the earth GND.

When light is not made incident onto the light receiving element 1, thepower source voltage V₂ is applied to the second inputs of the operationtransistor 3 and the signal output transistors 5a, 5b through thevoltage holding resistor 2, so that a weak current of, for example, 2 to3 μA, flows through the respective transistors. Due to the flow of thecurrent to the operation transistor 3 and signal output transistors 5a,5b, the second inputs of the respective transistors maintain a potentialof, for example, about 0.6 volts, even if light is not made incidentonto the light receiving element 1. In this way, by maintaining thepotential of the second inputs of the respective transistors at, forexample, about 0.6 volts, when light is not made incident onto the lightreceiving element 1, a current of, for example 40 μA, will flow whenlight hν is made incident onto the light receiving element 1. At thistime, the voltage holding resistor 2 increases the potential of thesecond inputs of the respective transistors from 0.6 volts to 0.61volts, instead of increasing from 0 volts to 0.61 volts, thus reducing atime delay required for increasing the potential of the second inputs ofthe above-mentioned transistors.

When the light hν is made incident onto the light receiving element 1, acurrent I_(d) flows through the light receiving element 1. At this time,the current I_(d) (for example, about 40 μA) flowing through the lightreceiving element 1 through the operation transistor 3 substantially notaffected by a junction capacitance 1a of the light receiving element 1and a wiring capacitance of the light receiving element 1, because aninternal resistance of the operation transistor 3 is small. In this way,if a current of, for example, 40 μA, flows through the operationtransistor 3, a current of 40 μA, which is the same value as thatflowing through the operation transistor 3, flows through the signaloutput transistors 5a, 5b, the second inputs of which are commonlyconnected (current-miller connected) to the second input of theoperation transistor 3. Therefore, at connections between the firstinputs of the respective signal output transistors 5a, 5b and thecorresponding signal output resistors 4a, 4b, the output signals O₁, O₂are transmitted each having a voltage which is lower than the powersource voltage V₃ by a voltage between both ends of each of the signaloutput resistors. Note, the transistors used as both the operationtransistor 3 and the signal output transistors 5a, 5b have a smalljunction capacitance and are a high-speed type.

As described above, a plurality of the output signals O₁, O₂ areobtained in response to the light hν which is made incident onto thelight receiving element 1. The output signals O₁, O₂ are separatelyapplied to a plurality of circuits in parallel, so that, in theplurality of the circuits for performing predetermined processes,signals can be correctly processed without interference between thecircuits.

Next, with reference to the drawings, an embodiment of a signalprocessor of a pulse encoder according to the present invention will bedescribed.

FIG. 5 is a schematic view showing an example of a pulse encoderadopting the signal processor of the pulse encoder according to thepresent invention. As shown in the drawing, the signal processor of thepulse encoder of the present invention is used, for example, forcounting the number of revolutions of a motor. A rotary disk 8a having aplurality of slits 81a is fitted to a rotary shaft 7 of the motor, and afixed disk 8b is provided with a plurality of slits 81b. Light fromlight emitting diodes 9a, 9b is intermittently made incident, due to thepositional relationships of the disks 8a and 8b, detected by photodiodes1a, 1b, and subjected to a predetermined process in the signal processorto obtain, for example, signals having an improved resolution. In FIG.5, two photodiodes are arranged, and these two photodiodes 1a, 1b arearranged such that light from the light emitting diodes 9a, 9b is madeincident with a phase difference of, for example, 90 degrees, throughthe plurality of slits of the rotary disk 8a and of the fixed disk 8b,to obtain output signals A and B.

The plurality of slits 81a and 81b formed on the rotary disk 8a and thefixed disk 8b, respectively, have manufacturing limits (for example, 2μm). To improve the manufacturing limits of the slits, four signals A,A, B, B having phases which differ from each other by 90 degrees arepicked out and subjected to predetermined processes to obtain signals(each having a phase difference of 45 degrees) for doubling an accuracyof the pulse encoder. Note, the signal A is an inverted signal of thesignal A and has a phase difference of 180 degrees with respect to thesignal A, and the signal B is an inverted signal of the signal B and hasa phase difference of 180 degrees with respect to the signal B.

FIG. 6 is a circuit diagram showing an embodiment of the signalprocessor of the pulse encoder according to the present invention, andFIG. 7 is a circuit diagram showing an example of a signal processingcircuit to which signals obtained by the circuit shown in FIG. 6 aresupplied. The circuits shown in FIGS. 6(a) to 6(d) are constituted inthe same manner as that of the circuit shown in FIG. 4, but have adifferent number of signal output resistors and signal outputtransistors depending on the number of output signals.

As shown in FIGS. 6 and 7, in an example of the signal processor of thepulse encoder according to the present invention, four output signals A,A, B, B each having a phase which is different from another by 90degrees are supplied as input signals to differential amplifiers E₁, E₂,E₃, E₄. The number of the output signal A, A, B, B is determined inaccordance with the number of signals to be applied to the fourdifferential amplifiers, and the number of signal output resistors andthe number of signal output transistors are determined in accordancewith the number of signals to be applied to the differential amplifiers.

That is, as shown in FIG. 7(a), the signal A is applied to three inputterminals, i.e., input terminals of the differential amplifiers E₁, E₂and an inverted input terminal of the differential amplifier E₄.Therefore, the signal A is constituted such that three output signalsA₁, A₂, A₃ are obtained by three signal output transistors 15a, 15b,15c. The signal A is applied only to an inverted input terminal of thedifferential amplifier E₁ and constituted such that one output signal Ais obtained by one signal output resistor 24 and one signal outputtransistor 25. The signal B is applied to two input terminals of thedifferential amplifiers E₃, E₄, and the signal B is applied to twoinverted input terminals of the differential amplifiers E₂, E₃, andtherefore, are constituted to obtain two output signals B₁, B₂ and B₁,B₂ respectively, by two respective output resistors 34a, 34b and 44a,44b, and two respective output transistors 35a, 35b and 45a, 45b.

The above described output signals A₁, A₂, A₃ ; B₁, B₂ ; and B₁, B₂ areapplied as input signals to the four differential amplifiers E₁, E₂, E₃,E₄ to obtain four signals D₁, D₂, D₃, D₄ after predetermined processes.Note, the signal D₁ is (A₁ -A₁), the signal D₂ is (A₂ -B₁), the signalD₃ is (B₁ -B₂) and the signal D₄ is (B₂ -A₃).

FIG. 8 is a waveform diagram showing signals to be processed by thecircuit shown in FIG. 7. FIG. 8(a) shows waveforms of the signals A₁ andA₁ in the differential amplifier E₁. Since the signal A₁ is applied toan input terminal of the differential amplifier E₁, the waveform thereofis slightly deformed by a hysteresis resistor R₁ connected to the inputand output terminals in parallel. Similarly, FIG. 8(b) shows waveformsof the signal A₂ and B₁ in the differential amplifier E₂. Since thesignal A₂ is applied to the input terminal of the differential amplifierE₂, the waveform thereof is slightly deformed by a hysteresis resistorR₂ connected to the input and output terminals in parallel. However, thedeformations of the signals are applied to the input terminals of thedifferential amplifiers E₃, E₄, so that the four processed signals D₁,D₂, D₃, D₄ will correctly divide an interval, in which the signal A (A₁,A₂, A₃) changes from 0 to 180 degrees, into four segments (45-degreeintervals). That is, each of the intervals W₁, W₂, W₃, W₄ of the fourprocessed signals will have an even length. The four signal D₁, D₂, D₃,D₄ each having an accurate phase interval of 45 degrees can improve theresolution of the pulse encoder.

In the above described embodiment, the four signals A, A, B, B have beenused as output signals, and the differential amplifiers E₁, E₂, E₃, E₄have been used as circuits for processing four signals. However, thesignal processor of the pulse encoder according to the present inventionis not limited to a processing of four output signals by fourdifferential amplifiers. Although photodiodes have been used as thelight receiving elements, the signal processor of the pulse encoderaccording to the present invention can also used phototransistors, etc.,instead of the photodiodes, as light receiving elements.

We claim:
 1. A signal processor of a pulse encoder for photoelectricallyconverting light (hν) made incident onto a light receiving element (1)into output signals (O₁, O₂) and supplying said photoelectricallyconverted output signals to a plurality of circuits to carry outpredetermined processes, characterized in that said signal processorcomprises:an operation transistor (3) having a first input to which afirst power source voltage (V₁) is applied through said light receivingelement (1), a second input to which a second power source voltage (V₂)is applied and commonly connected to said first input, and a third inputwhich is grounded; a plurality of signal output resistors (4a, 4b), oneends thereof being supplied with a third power source voltage (V₃); anda plurality of signal output transistors (5a, 5b) of a same number asthat of said signal output resistors, having first inputs connected tothe other ends of said signal output resistors (4a, 4b), second inputsconnected to said second input of said operation transistor (3), andthird inputs which are grounded, to be operated in accordance with saidoperation transistor (3), said photoelectrically converted outputsignals (O₁, O₂) to be supplied in parallel to said plurality ofcircuits being separately supplied from respective connections betweensaid signal output resistors (4a, 4b) and said first inputs of saidsignal output transistors (5a, 5b).
 2. A signal processor according toclaim 1, wherein said second input of said operation transistor (3) issupplied with said second power source voltage (V₂) through a voltageholding resistor (2).
 3. A signal processor according to claim 1,wherein said plurality of circuits being supplied with saidphotoelectrically converted output signals (O₁, O₂) comprisedifferential amplifiers having hysteresis resistors.